Design and Optimization of a P+N+IN+ Tunnel FET with Si Channel and SiGe Source
نویسنده
چکیده
A Silicon tunnel FET with Si1-x Gex source is investigated and optimized for improved performance. In order to optimize the device performance, Germanium mole fraction and the length of the SiGe region is varied and the optimum values are obtained. Moreover, the source/channel hetero-junction is assumed graded. The grading distance is varied from zero (abrupt hetero-junction) to total channel length to achieve the best performance, i.e. low offstate current, high Ion/Ioff and low sub-threshold swing.
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